DocumentCode
3118706
Title
A 350 MHz bipolar monolithic PLL
Author
Soyuer, Mehmet ; Meyer, Robert G.
Author_Institution
Dept. of Electr. Eng., & Comput. Sci., California Univ., Berkeley, CA, USA
fYear
1988
fDate
16-19 May 1988
Abstract
A high-frequency, low bipolar monolithic phase-locked loop which can be used in clock recovery systems operative above 300 MHz has been designed and fabricated. Building blocks of the phase-locked-loop (PLL) circuit to be discussed include an analog phase detector, a temperature-compensated VCO (voltage-controlled oscillator) with an on-chip varactor diode, a two-stage loop amplifier, and a bandgap reference. The circuit operates from a 5-V supply and dissipates 270 mW
Keywords
bipolar integrated circuits; phase-locked loops; 300 MHz; 350 MHz; 5 V; analog phase detector; bandgap reference; bipolar monolithic PLL; clock recovery systems; phase-locked loop; two-stage loop amplifier; voltage-controlled oscillator; Capacitance; Circuits; Clocks; Detectors; Diodes; Frequency; Phase detection; Phase locked loops; Varactors; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 1988., Proceedings of the IEEE 1988
Conference_Location
Rochester, NY
Type
conf
DOI
10.1109/CICC.1988.20834
Filename
20834
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