A self-hosting configuration management system to mitigate the impact of Radiation-Induced Multi-Bit Upsets in SRAM-based FPGAs

This paper presents an efficient circuit to mitigate the impact of Radiation-Induced Multi-Bit Upsets in Xilinx FPGAs from Virtex-II on. The proposed internal scrubber detects and corrects single bit upsets and double, triple and quadruple multi bit upsets by efficiently exploiting permuted and compressed Hamming check codes. When implemented using a Xilinx XC2V1000 Virtex-II device, it occupies just 1488 slices and dissipates less than 30 mW at a 50MHz running frequency, taking just 18us to complete the error checking over a single frame, and 18.76us to repair the corrupted frame.