Boundary Value Testing Using Integrated Circuit Fault Detection Rule

Author

Zhao, Ruilian ; Li, Zheng

Author_Institution

Dept. of Comput. Sci., Beijing Univ. of Chem. Technol., Beijing, China

fYear

2009

fDate

4-6 Sept. 2009

Firstpage

3

Lastpage

12

Abstract

Boundary value testing is a widely used functional testing approach. This paper presents a new boundary value selection approach by applying fault detection rules for integrated circuits. Empirical studies based on Redundant Strapped-Down Inertial Measurement Unit of the 34 program versions and 426 mutants compare the new approach to the current boundary value testing methods. The results show that the approach proposed in this paper is remarkably effective in conquering test blindness, reducing test cost and improving fault coverage.

Keywords

boundary-value problems; fault location; integrated circuit reliability; program testing; software quality; software reliability; boundary value selection; boundary value testing; functional testing; integrated circuit fault detection rule; redundant strapped-down inertial measurement unit; Circuit faults; Circuit testing; Computer science; Costs; Electrical fault detection; Fault detection; Integrated circuit testing; Measurement units; Robustness; Software testing; Boundary Value Testing; Test case generation; fault detection;

fLanguage

English

Publisher

ieee

Conference_Titel

Testing: Academic and Industrial Conference - Practice and Research Techniques, 2009. TAIC PART '09.

Conference_Location

Windsor

Print_ISBN

978-0-7695-3820-4

Type

conf

DOI

10.1109/TAICPART.2009.33

Filename

5381653