Title :
Yield learning using the defect reticle method
Author :
Neyer, Thomas ; Hafner, Michaela
Author_Institution :
Yield Enhancement Projects PL VI, Infineon Technol., Villach, Austria
Abstract :
In this paper we describe a technique called the defect reticle method and illustrate its application to semiconductor manufacture. This technique sheds light on many unknown and so far inaccessible relationships between defect types and yield loss. We discuss an excerpt of results from the first year of application of this method within Infineon.
Keywords :
integrated circuit yield; lithography; point defects; reticles; defect reticle method; integrated circuit yield; lithography; semiconductor manufacture; yield learning; yield loss; Circuit faults; Contamination; Monitoring; Process control; Production; Profitability; Stability; Testing; Time to market; Uninterruptible power systems;
Conference_Titel :
Advanced Semiconductor Manufacturing, 2004. ASMC '04. IEEE Conference and Workshop
Print_ISBN :
0-7803-8312-5
DOI :
10.1109/ASMC.2004.1309546
