Title :
A 4 digit CMOS quaternary to analog converter with current switch and neuron MOS down-literal circuit
Author :
Han, Sung Il ; Choi, Young Hee ; Kim, Heung Soo
Author_Institution :
Dept. of Electron. Eng., Inha Univ., Inchon, South Korea
Abstract :
This paper describes a 3.3 V low power 4 digit CMOS quaternary to analog converter (QAC) designed with a neuron MOS down literal circuit block and cascode current mirror source block. The neuron MOS down literal architecture allows the designed QAC to accept not only 4 level voltage inputs, but also a high speed sampling rate quaternary voltage source at LSB. Fast settling time and low power consumption of the QAC are achieved by utilizing the proposed architecture. The simulation results of the designed 4 digit QAC show a sampling rate of 6 MHz and a power dissipation of 1 mW with a single power supply of 3.3 V for a double poly four metal standard CMOS 0.35 □ n-well technology
Keywords :
CMOS logic circuits; digital-analogue conversion; multivalued logic; power consumption; 4 digit CMOS quaternary to analog converter; cascode current mirror source block; current switch; high speed sampling rate; neuron MOS down-literal circuit; quaternary voltage source; simulation results; CMOS analog integrated circuits; Energy consumption; Mirrors; Neurons; Power dissipation; Power supplies; Sampling methods; Switches; Switching converters; Voltage;
Conference_Titel :
Multiple-Valued Logic, 2001. Proceedings. 31st IEEE International Symposium on
Conference_Location :
Warsaw
Print_ISBN :
0-7695-1083-3
DOI :
10.1109/ISMVL.2001.924556