Title :
A three-valued D-flip-flop and shift register using multiple-junction surface tunnel transistors
Author :
Uemura, Tetsuya ; Baba, Toshio
Author_Institution :
Syst. Devices & Fundamental Res., NEC Corp., Ibaraki, Japan
Abstract :
A three-valued D-flip-flop (D-FF) circuit and a two-stage shift register built from InGaAs-based multiple-junction surface tunnel transistors (MJSTT) and Si-based metal-oxide-semiconductor field effect transistors (MOSFET) have been demonstrated. Due to the combination of the MJSTT´s latching function and the MOSFET´s switching function, the number of devices required for the D-FF circuit was greatly reduced to two from the thirty required for the FET-only circuit
Keywords :
MOSFET; flip-flops; shift registers; ternary logic; tunnel transistors; InGaAs-based multiple-junction surface tunnel transistors; Si-based MOSFET; latching function; shift register; switching function; three-valued D-flip-flop; FETs; Fabrication; Logic devices; MOSFETs; National electric code; Resonant tunneling devices; Shift registers; Switching circuits; Voltage; Wiring;
Conference_Titel :
Multiple-Valued Logic, 2001. Proceedings. 31st IEEE International Symposium on
Conference_Location :
Warsaw
Print_ISBN :
0-7695-1083-3
DOI :
10.1109/ISMVL.2001.924559
