SPEED-a highly flexible slice structure and datapath generator

A novel generator for bit-slice and datapath structures is presented. It is a multipurpose macrocell generator usable in high-speed applications. The main features are a high degree of architectural, functional, and topological flexibility as well as electrical and geometrical optimization capabilities. The datapath is based on a bus-oriented architecture. The number of internal buses is arbitrary. Since the generation of a control unit for basic decoding and internal clock distribution is optional, there is no overhead if a circuit consists of several datapaths. Testability and design-rule updatability concepts are covered