DocumentCode :
3120789
Title :
Circuit layout evolution: an evolvable hardware approach
Author :
Kalganova, Tatiana ; Miller, Julian F.
Author_Institution :
Sch. of Comput., Napier Univ., Edinburgh, UK
fYear :
1999
fDate :
1999
Firstpage :
42430
Lastpage :
42433
Abstract :
The evolvable hardware technique is based on evolving the functionality and connectivity of a rectangular array of logic cells in addition to the layout of this array. The evolutionary process contains two main steps. Initially the genome fitness in given by the percentage of output bits, which are correct. Once 100% functional circuits have been evolved, the number of gates actually used in the circuit is taken into account in the fitness function. This allows us to evolve a circuit with 100% functionality and minimise the number of active gates in circuit structure. We perform a number of experiments to investigate the behaviour of the second fitness function and the circuit layout during evolution. We find that the gate usage is linearly related to the total number of gates in the chromosome
Keywords :
logic arrays; active gates; circuit layout; circuit layout evolution; circuit structure; evolutionary process; evolvable hardware approach; evolvable hardware technique; fitness function; functional circuits; gate usage; genome fitness; logic cells; output bits; rectangular array;
fLanguage :
English
Publisher :
iet
Conference_Titel :
Evolutionary Hardware Systems (Ref. No. 1999/033), IEE Half-day Colloquium on
Conference_Location :
London
Type :
conf
DOI :
10.1049/ic:19990180
Filename :
789893
Link To Document :
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