Sine/cos generator for direct digital frequency synthesizer using pipelined CORDIC processor

Signal generators, also known as function generators, they are electronic devices that generate repeating or non-repeating electronic signals in either the analog or digital form. They are generally used in designing, testing, troubleshooting, and repairing electronic or electro acoustic devices, though they often have artistic uses as well. Many features added to function generators have complicated their design and increased their cost. We cannot create any arbitrary waveform. There is an opportunity for a radical redesign of the familiar function generator using Direct Digital Frequency Synthesis (DDFS). In this paper we present a hardware efficient architecture by using CORDIC algorithm for the calculation of sine and cosine functions for DDFS. This approach is simulated using ModelSim simulation software, synthesized using Xilinx ISE design suite and the proposed architecture is implemented on Xilinx FPGA target device i.e. SPARTAN 3E. Finally, the device utilization summary and timing reports are presented, finally we revised CORDIC algorithm implementation in 180 nm standard CMOS technology using Synopsys tools and investigate its performance The dominant factor favourable to ASICs is their lower power consumption, which is of primary concern for DDFS devices and their lower cost in large volumes. The proposed architecture has been implemented in VLSI using 0.18 micron technology with a core area of 7.452 mm², and the dimensions of the chip are 3.16 mm 3.16 mm.