DocumentCode :
3121359
Title :
Applying the adaptive Hybrid Flow-Shop scheduling method to schedule a 3GPP LTE physical layer algorithm onto many-core digital signal processors
Author :
Heulot, Julien ; Boutellier, Jani ; Pelcat, Maxime ; Nezan, Jean-Francois ; Aridhi, Slaheddine
Author_Institution :
IETR, INSA Rennes, Rennes, France
fYear :
2013
fDate :
24-27 June 2013
Firstpage :
123
Lastpage :
129
Abstract :
Currently, Multicore Digital Signal Processor (DSP) platforms are commonly used in telecommunications baseband processing. In the next few years, high performance DSPs are likely to combine many more DSP cores for signal processing with some General-Purpose Processor (GPP) cores for application control. As the number of cores increases in new DSP platform designs, scheduling of applications is becoming a complex operation. Meanwhile, the variability of the scheduled applications also tends to increase as applications become more sophisticated. Such variations require runtime adaptivity of application scheduling. This paper extends the previous work on adaptive scheduling by using the Hybrid Flow-Shop (HFS) scheduling method, which enables the device architecture to be modeled as a pipeline of Processing Elements (PEs) with multiple alternate PEs for each pipeline stage. HFS scheduling is applied to the scheduling of 3rd Generation Partnership Project (3GPP) Long Term Evolution (LTE) telecommunication standard Uplink Physical Layer data processing (PUSCH). The experiments, conducted on an ARM Cortex-A9 GPP, show that an HFS scheduling algorithm has an overhead that increases very slowly with the number of PEs. This makes the method suitable for executing the adaptive scheduling in less than 1 ms for the 501 actors of a LTE PUSCH dataflow description executed on a 256-core architecture.
Keywords :
3G mobile communication; Long Term Evolution; digital signal processing chips; flow shop scheduling; multiprocessing systems; telecommunication computing; 3GPP LTE physical layer algorithm; 3rd generation partnership project; ARM Cortex-A9 GPP; DSP platform; GPP; HFS scheduling method; LTE PUSCH dataflow description; adaptive hybrid flow-shop scheduling method; application scheduling; general-purpose processor; long-term evolution; many-core digital signal processor; multicore digital signal processor; processing element; telecommunications baseband processing; Computer architecture; Decoding; Digital signal processing; Long Term Evolution; Pipelines; Processor scheduling; Schedules;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Adaptive Hardware and Systems (AHS), 2013 NASA/ESA Conference on
Conference_Location :
Torino
Type :
conf
DOI :
10.1109/AHS.2013.6604235
Filename :
6604235
Link To Document :
بازگشت