DocumentCode :
3121471
Title :
Semi-asynchronous checkpointing for optimistic simulation on a Myrinet based NOW
Author :
Quaglia, Francesco ; Santoro, Andrea
Author_Institution :
Dipartimento di Inf. e Sistemistica, Rome Univ., Italy
fYear :
2001
fDate :
2001
Firstpage :
56
Lastpage :
63
Abstract :
Great effort has been devoted to the design of optimized checkpointing strategies for optimistic parallel discrete event simulators. On the other hand, there is less work being done in the direction of improving the execution mode of any single checkpoint operation. Specifically, checkpoint operations are typically charged to the CPU, thus leading to freezing of the simulation application while checkpointing is in progress, i.e. the execution mode of the checkpointing protocol is typically synchronous. In this paper, we focus on improvements of the execution mode and present a software architecture, designed for Myrinet-based networks of workstations (NOWs), to avoid application freezing during any checkpoint operation, thus moving the execution itself towards an asynchronous mode. This is done by charging checkpoint operations to a hardware component that is distinct from the CPU, namely a DMA (direct memory access) engine. On the other hand, totally asynchronous checkpointing could suffer from data inconsistency whenever the content of a state buffer is accessed for further modifications while a checkpoint operation involving it has not yet completed. To avoid this, the architecture includes functionalities for resynchronization on demand. We have used these functionalities to implement an execution mode of the checkpointing protocol that we refer to as semi-asynchronous. By the results of an experimental study, we argue that the semi-asynchronous mode can be an effective solution to almost completely remove the delay associated with any checkpoint operation from the completion time of the simulation
Keywords :
data integrity; discrete event simulation; parallel programming; software architecture; synchronisation; system recovery; workstation clusters; Myrinet-based workstation network; application freezing; checkpoint operation execution mode; data inconsistency; delay removal; direct memory access engine; on-demand resynchronization; optimistic parallel discrete event simulation; semi-asynchronous checkpointing; software architecture; state buffer access; Application software; Checkpointing; Design optimization; Discrete event simulation; Engines; Hardware; Protocols; Software architecture; Software design; Workstations;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel and Distributed Simulation, 2001. Proceedings. 15th Workship on
Conference_Location :
Lake Arrowehead, CA
Print_ISBN :
0-7695-1104-X
Type :
conf
DOI :
10.1109/PADS.2001.924621
Filename :
924621
Link To Document :
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