DocumentCode
3121936
Title
Initial acquisition time of M-ary/SS communication system with several synchronizing chips
Author
Ohuchi, Iiouji ; Habuchi, Hironiasa
Author_Institution
Dept. of Comput. & Inf. Sci., Ibaraki Univ., Japan
Volume
1
fYear
1996
fDate
22-25 Sep 1996
Firstpage
161
Abstract
M-ary/SS communication systems can improve bit error rate performance under the condition that in which there is an additive white Gaussian noise. Synchronization of M-ary/SS communication systems becomes difficult, however, because M-ary/SS communication systems have several spreading sequences. The authors proposed a simple frame synchronization system which uses one chip in the spreading sequence as the framing signal. This system needs a long time for initial acquisition. The frame synchronization system which makes the initial acquisition time short is proposed. In this system, the number of framing chips (r) is greater than 1. The proposed system corresponds to the conventional system when r=1. As a result, when 10 framing chips are added to a 31 chip spreading sequence under a 10-4 bit error rate, the initial acquisition time of the proposed system is 88% shorter than that of when 1 chip is added
Keywords
Gaussian noise; coding errors; error statistics; sequences; spread spectrum communication; synchronisation; white noise; BER; M-ary/SS communication system; additive white Gaussian noise; bit error rate; bit error rate performance; chip spreading sequence; frame synchronization system; framing chips; framing signal; initial acquisition time; synchronizing chips; AWGN; Additive noise; Additive white noise; Bit error rate; Counting circuits; Interference; Optical fiber communication; Power line communications; Spread spectrum communication; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Spread Spectrum Techniques and Applications Proceedings, 1996., IEEE 4th International Symposium on
Conference_Location
Mainz
Print_ISBN
0-7803-3567-8
Type
conf
DOI
10.1109/ISSSTA.1996.563762
Filename
563762
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