Title :
BIST using pseudorandom test vectors and signature analysis
Author_Institution :
Tektronix Inc., Beaverton, OR, USA
Abstract :
A tutorial is provided on a popular built-in self-test (BIST) scheme that uses pseudorandomly generated vectors as test stimuli and the signature-analysis technique to verify test results. The guidelines presented permit IC designers to implement the BIST method in their circuits using various design considerations and tradeoffs to achieve hardware efficiency and improved levels of controllability, observability, and testability
Keywords :
integrated circuit testing; BIST method; built-in self-test; controllability; design considerations; guidelines; hardware efficiency; observability; pseudorandom test vectors; pseudorandomly generated vectors; signature analysis; testability; tradeoffs; tutorial; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Controllability; Data compression; Hardware; Integrated circuit testing; Observability; Shift registers;
Conference_Titel :
Custom Integrated Circuits Conference, 1988., Proceedings of the IEEE 1988
Conference_Location :
Rochester, NY
DOI :
10.1109/CICC.1988.20877
