• DocumentCode
    3122568
  • Title

    Comparison of latchup immunity for silicided source/drain at different n+ implant energy

  • Author

    Chew, Leong Kam ; Liu Po Chen ; Hing, Gan Chock ; Gang, Qian ; Meng, Lee Yong ; Chan, Lap

  • Author_Institution
    Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore
  • fYear
    1997
  • fDate
    35672
  • Firstpage
    15
  • Lastpage
    18
  • Abstract
    N-channel MOSFET devices with excellent latchup immunity for 0.25 μm technology are fabricated with 50 Å gate oxide, retrograde N-Well, shallow junction (30 keV), and titanium silicided source/drain (S/D). The current gain (β) of the npn parasitic bipolar transistor was reduced from about 5 to less than 1 and the latchup trigger current (Itrig was increased from 13 mA to more than 15 mA). All these improvements are observed when comparing silicided and non-silicided S/D at 30 keV n+ implant energy. In addition, between silicided wafers, those with lower n+ implant energy (30 keV) are more latchup immune than those with higher n+ implant energy (40 keV)
  • Keywords
    MOSFET; ion implantation; 0.25 micron; 15 mA; 30 to 40 keV; N-channel MOSFET; current gain; gate oxide; latchup immunity; n+ implant energy; npn parasitic bipolar transistor; retrograde N-Well; shallow junction; titanium silicided source/drain; trigger current; Bipolar transistors; CMOS technology; Charge carrier processes; Electron emission; Implants; Inverters; MOSFET circuits; Silicides; Testing; Titanium; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices Meeting, 1997. Proceedings., 1997 IEEE Hong Kong
  • Print_ISBN
    0-7803-3802-2
  • Type

    conf

  • DOI
    10.1109/HKEDM.1997.642310
  • Filename
    642310