Performances of Si nanocrystal memories obtained by by CVD and their potentialities to further scaling of non-volatile memories

Author

Gerardi, C. ; ESalvo, B.D. ; Lombardo, Salvatore ; Baron, T.

Author_Institution

STMicroelectronics, Catania, Italy

fYear

2004

fDate

2004

Firstpage

37

Lastpage

43

Abstract

We have fabricated nanocrystal memories both single cells and arrays by using low pressure chemical vapor deposition of silicon nanocrystals. The potentialities of nanocrystal memories are discussed both in terms of nanocrystal deposition and control dielectrics optimization. Excellent performances are achieved, showing that this technology shows potentialities for non volatile memory cell scaling. In addition we discuss the impact of the fluctuations in nanocrystals distribution on the scaling possibilities of these memories.

Keywords

CMOS memory circuits; chemical vapour deposition; elemental semiconductors; flash memories; hot carriers; nanoelectronics; silicon; tunnelling; CMOS flash technology; CVD fabricated memories; Fowler-Nordheim tunnelling; NAND application; NOR application; Si; channel hot electron injection; control dielectrics optimization; low pressure chemical vapor deposition; memory performance; nanocrystal deposition; nanocrystal distribution fluctuations; nanocrystal memories; nonvolatile memories scaling; single cells; test arrays; Chemical vapor deposition; Dielectrics; Flash memory; Fluctuations; Nanocrystals; Nonvolatile memory; Process control; Scanning electron microscopy; Silicon; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Integrated Circuit Design and Technology, 2004. ICICDT '04. International Conference on

Print_ISBN

0-7803-8528-4

Type

conf

DOI

10.1109/ICICDT.2004.1309902

Filename

1309902