Title :
Advanced device structure for aggressively scaled MOSFETs
Author_Institution :
Inst. of Ind. Sci., Univ. of Tokyo, Japan
Abstract :
In this paper, we present our recent research work on device structures in the 10 nm scale. Considering the short channel immunity in the nanoscale regime, the fully-depleted SOI structures, including double-gate structures and FinFETs, have been selected. The optimum device structures have been discussed in terms of short channel effect, low power, and device characteristic fluctuations. The idea of "body-effect conscious" device design is proposed.
Keywords :
MOSFET; low-power electronics; nanoelectronics; semiconductor device models; silicon-on-insulator; 10 nm; 3D gate structure; FinFET; advanced device structure; aggressively scaled MOSFET; body-effect conscious device design; device characteristic fluctuations; double-gate structures; fully-depleted SOI structures; low power; nanoscale regime; optimum device structures; short channel immunity; simulated gate length dependence; variable body factor; variable threshold voltage CMOS scheme; Circuits; Fluctuations; Guidelines; Immune system; MOS devices; MOSFETs; Power dissipation; Silicon; Threshold voltage; Very large scale integration;
Conference_Titel :
Integrated Circuit Design and Technology, 2004. ICICDT '04. International Conference on
Print_ISBN :
0-7803-8528-4
DOI :
10.1109/ICICDT.2004.1309908
