DocumentCode
3124375
Title
A high performance processor for applications based on fuzzy logic
Author
Ascia, Giuseppe ; Catania, Vincenzo
Author_Institution
Inst. di Inf. e Telecommun., Catania, Italy
Volume
3
fYear
1999
fDate
22-25 Aug. 1999
Firstpage
1685
Abstract
The paper presents the architecture of a digital processor dedicated to execution of fuzzy inference. The paper presents the design of a VLSI architecture dedicated to execution of fuzzy inference. The execution speed is up to 16 MFLIPS for inferences with 128 rules with 4 linguistic variables, 11 MFLIPS with 8 linguistic variables. This level of performance is obtained by means of a method that reduces the number of rules to be processed. Moreover, rule processing is split into a sequence of pipeline stages which make it possible to process the active rules at each clock cycle and a certain degree of parallelism is introduced into these stages.
Keywords
fuzzy logic; inference mechanisms; parallel architectures; VLSI architecture; execution speed; fuzzy inference; fuzzy logic; rule processing; Computer architecture; Fuzzy logic; Fuzzy sets; Hardware; Parallel architectures; Parallel processing; Pipelines; Telecommunications; Time factors; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Fuzzy Systems Conference Proceedings, 1999. FUZZ-IEEE '99. 1999 IEEE International
Conference_Location
Seoul, South Korea
ISSN
1098-7584
Print_ISBN
0-7803-5406-0
Type
conf
DOI
10.1109/FUZZY.1999.790159
Filename
790159
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