DocumentCode :
3124415
Title :
A two stage selective averaging LDPC decoding
Author :
Kumar, A.D. ; Dukkipati, Ambedkar
Author_Institution :
Dept. of Comput. Sci. & Autom., Indian Inst. of Sci., Bangalore, India
fYear :
2012
fDate :
1-6 July 2012
Firstpage :
2866
Lastpage :
2870
Abstract :
Low density parity-check (LDPC) codes are a class of linear block codes that are decoded by running belief propagation (BP) algorithm or log-likelihood ratio belief propagation (LLR-BP) over the factor graph of the code. One of the disadvantages of LDPC codes is the onset of an error floor at high values of signal to noise ratio caused by trapping sets. In this paper, we propose a two stage decoder to deal with different types of trapping sets. Oscillating trapping sets are taken care by the first stage of the decoder and the elementary trapping sets are handled by the second stage of the decoder. Simulation results on the regular PEG (504,252,3,6) code and the irregular PEG (1024,518,15,8) code shows that the proposed two stage decoder performs significantly better than the standard decoder.
Keywords :
block codes; decoding; graph theory; linear codes; parity check codes; set theory; factor graph; irregular PEG code; linear block codes; low density parity check codes; selective averaging LDPC decoding; trapping set; two stage decoder; Charge carrier processes; Decoding; Iterative decoding; Reliability; Signal to noise ratio; Standards;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Information Theory Proceedings (ISIT), 2012 IEEE International Symposium on
Conference_Location :
Cambridge, MA
ISSN :
2157-8095
Print_ISBN :
978-1-4673-2580-6
Electronic_ISBN :
2157-8095
Type :
conf
DOI :
10.1109/ISIT.2012.6284048
Filename :
6284048
Link To Document :
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