DocumentCode :
3124433
Title :
Cell library techniques using advanced transistor structures
Author :
Aitken, Robert ; Becker, Scott
Author_Institution :
Artisan Components, Sunnyvale, CA, USA
fYear :
2004
fDate :
2004
Firstpage :
199
Lastpage :
204
Abstract :
Aggressive performance and power goals for coming process generations are forcing rethinking of some of the basic assumptions of CMOS transistors, and leading to innovative approaches such as strained silicon and metal gates. These methods have implications for the design of standard cells, embedded memories, and other library components. This paper examines these new trends and shows how they affect the design of these components, and by extension, the systems-on-chip built from them.
Keywords :
CMOS logic circuits; CMOS memory circuits; MOSFET; SRAM chips; cellular arrays; integrated circuit design; logic CAD; silicon-on-insulator; system-on-chip; CMOS transistors; SOI; SRAM; advanced transistor structures; cell library techniques; embedded memories; library intellectual property; metal gates; multi-threshold CMOS; multiple threshold voltages; silicon validation; standard cell design; strained silicon; systems-on-chip; Capacitance; Design for manufacture; Foundries; Libraries; Manufacturing processes; Process design; Semiconductor device measurement; Silicon; Testing; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Integrated Circuit Design and Technology, 2004. ICICDT '04. International Conference on
Print_ISBN :
0-7803-8528-4
Type :
conf
DOI :
10.1109/ICICDT.2004.1309945
Filename :
1309945
Link To Document :
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