DocumentCode
3124456
Title
A 667 ns, 12-bit two-step flash ADC
Author
Kerth, Donald A. ; Sooch, Navdeep S. ; Swanson, Eric J.
Author_Institution
Crystal Semicond. Corp., Austin, TX, USA
fYear
1988
fDate
16-19 May 1988
Abstract
A monolithic 12-bit, 667-ns, two-step flash analog-to-digital converter has been implemented in standard 3-μm CMOS technology. A 12-bit accurate reference bank incorporating a switched-capacitor integrator and a bank of 66 sample-and-hold amplifiers is discussed. Self-calibration techniques are used to correct for the converter´s gain and offset errors
Keywords
CMOS integrated circuits; analogue-digital conversion; calibration; switched capacitor networks; 12 bit; 12-bit accurate reference bank; 3 micron; 667 ns; CMOS technology; gain correction; monolithic A/D convertor; offset errors correction; sample/hold amplifier bank; self calibration technique; switched-capacitor integrator; two-step flash ADC; Analog-digital conversion; CMOS technology; Calibration; Digital signal processing; Error correction; Programmable logic arrays; Resistors; Signal resolution; Throughput; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 1988., Proceedings of the IEEE 1988
Conference_Location
Rochester, NY
Type
conf
DOI
10.1109/CICC.1988.20893
Filename
20893
Link To Document