DocumentCode
312538
Title
Design and implementation of a sixth order bandpass delta-sigma A/D converter with single quantizer
Author
Chuang, Sean ; Yu, Xianggang ; Sculley, Terry L. ; Bamberger, Roberto H.
Author_Institution
Burr-Brown Corp., Tucson, AZ, USA
Volume
1
fYear
1997
fDate
9-12 Jun 1997
Firstpage
381
Abstract
A sixth order bandpass delta-sigma A/D converter has been designed and implemented in a 2 μm n-well double poly, double metal CMOS process. The design uses a switched-capacitor cascade-of-resonators topology with half-delay integrators and achieves a SNR of 80 dB over a 0.004π input bandwidth
Keywords
CMOS integrated circuits; integrated circuit design; quantisation (signal); sigma-delta modulation; switched capacitor networks; 2 micron; 80 dB; SC cascade-of-resonators topology; SNR; delta-sigma A/D converter; double poly double metal process; half-delay integrators; n-well CMOS process; single quantizer; sixth order bandpass ADC; switched-capacitor topology; Bandwidth; Computer industry; Filtering theory; Linearity; Metals industry; Quantization; Signal design; Signal processing; Signal resolution; Transfer functions;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1997. ISCAS '97., Proceedings of 1997 IEEE International Symposium on
Print_ISBN
0-7803-3583-X
Type
conf
DOI
10.1109/ISCAS.1997.608747
Filename
608747
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