DocumentCode :
312557
Title :
Modified probabilistic neural network hardware implementation schemes
Author :
Zaknich, Anthony ; Attikiouzel, Yianni
Author_Institution :
Dept. of Electr. & Electron. Eng., Western Australia Univ., Nedlands, WA, Australia
Volume :
1
fYear :
1996
fDate :
26-29 Nov 1996
Firstpage :
167
Abstract :
The modified probabilistic neural network for nonlinear time series analysis was developed and introduced in 1991. It effectively represents a simple family of clustering methods for reducing the size of Specht´s general regression neural network and retaining all its benefits. Three hardware implementation schemes for the most basic form of the modified probabilistic neural network are described. The first is an optoelectronic implementation and the other two are very large scale integration designs: a virtual implementation and a fully parallel implementation
Keywords :
VLSI; digital signal processing chips; feedforward neural nets; integrated optoelectronics; neural chips; optical neural nets; parallel architectures; time series; RBF neural networks; Specht general regression neural network; VLSI; clustering; nonlinear time series analysis; optoelectronics; probabilistic neural network; CMOS technology; Concurrent computing; Digital signal processing; Neural network hardware; Neural networks; Nonlinear equations; Optical signal processing; Parallel processing; Signal processing; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
TENCON '96. Proceedings., 1996 IEEE TENCON. Digital Signal Processing Applications
Conference_Location :
Perth, WA
Print_ISBN :
0-7803-3679-8
Type :
conf
DOI :
10.1109/TENCON.1996.608775
Filename :
608775
Link To Document :
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