Comparison of fixed and variable sampling frequency digital PLL for active power filters

This research addresses different characteristics of two Digital Phase-Locked Loop (DPLL) methods with fixed and variable sampling frequency for Active Power Filters (APFs). The mathematic models and design procedure for both DPLL strategies are presented in the paper. Both DPLL methods are based on dq transform phase detection and can be immune to the utility distorted and unbalance because of the low pass characteristics of the loop filter. Experimental results verify that the DPLL with fixed sampling frequency acquires excellent dynamic responses while the one with variable sampling frequency is suitable for digital repetitive control algorithm aiming at enhancing steady-state compensation precision in APFs application.