DocumentCode
312603
Title
A new VLSI architecture for perceptron network
Author
Hasan, S. M Rezaul ; Chin, Chen Seong
Author_Institution
Sch. of Electr. & Electron. Eng., Univ. Sains Malaysia, Perak, Malaysia
Volume
1
fYear
1996
fDate
26-29 Nov 1996
Firstpage
352
Abstract
A new architecture for multilayer perceptron network called the sliding feeder perceptron neural network is proposed. The sliding feeder is a shift register that can shift the input activities one by one to the neurons for processing. Compared to the conventional perceptron neutral network, this new architecture requires less multipliers. Only N multipliers are needed instead of N2 multipliers for the conventional perceptron neural network. The connection between the neurons are also very simple. There are no overlapping connection between the neurons. This implies fewer layers of metal for fabrication. Furthermore, this new architecture is based on a modular design. Hence, the network can be extended easily. Only the micro-code need to be changed. Hardware simulations has been done on a 3-layer network and the feedforward and back propagation processes are proven to be functional
Keywords
VLSI; backpropagation; digital signal processing chips; feedforward neural nets; multilayer perceptrons; neural chips; shift registers; 3-layer network; VLSI architecture; backpropagation; feedforward neural network; hardware simulations; input activities; microcode; modular design; multilayer perceptron network; multipliers; shift register; sliding feeder perceptron neural network; Artificial neural networks; Broadcasting; Equations; Geometry; Neural networks; Neurons; Shift registers; Signal processing; Transfer functions; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
TENCON '96. Proceedings., 1996 IEEE TENCON. Digital Signal Processing Applications
Conference_Location
Perth, WA
Print_ISBN
0-7803-3679-8
Type
conf
DOI
10.1109/TENCON.1996.608840
Filename
608840
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