Layout design and simulation of fault tolerant triple modular redundant ALU system

Author

Ghosh, Sudip ; Sengar, Jitendra Singh

Author_Institution

Dept. of Electron. & Commun. Eng., Lovely Prof. Univ., Jalandhar, India

fYear

2013

fDate

4-6 July 2013

Firstpage

1

Lastpage

7

Abstract

Reliability is one of the most critical factors that is to be considered during the designing phase of any product. There are many factors that contribute to make a system more reliable in terms of area, power, operating frequency and accuracy. This paper proposes the design of a 4bit fault tolerant ALU system using backend designing. Parallel processing along with triple modular redundancy (TMR) has been used to increase the operating speed of the system and also to make the system fault tolerant and accurate. The backend designing has been done using Micro-wind 3.1.7

Keywords

VLSI; arithmetic; circuit simulation; fault tolerance; integrated circuit layout; integrated circuit reliability; parallel processing; Micro-wind 3.1.7; TMR; arithmetic logical unit; backend designing; fault tolerant; layout design; parallel processing; reliability; simulation; triple modular redundancy; triple modular redundant ALU system; Fault tolerant systems; Hardware; Layout; Logic gates; Redundancy; Tunneling magnetoresistance; ALU; Fault Tolerance; Redundancy; TMR; Voting Logic;

fLanguage

English

Publisher

ieee

Conference_Titel

Computing, Communications and Networking Technologies (ICCCNT),2013 Fourth International Conference on

Conference_Location

Tiruchengode

Print_ISBN

978-1-4799-3925-1

Type

conf

DOI

10.1109/ICCCNT.2013.6726737

Filename

6726737