DocumentCode :
3127533
Title :
A 45k HEMT Gate Array With 35ps DCFL And 50ps BDCFL Gates
Author :
Notomi, S. ; Kondo, T. ; Watanabe, Y. ; Kosugi, M. ; Hanyu, S. ; Suzuki, M. ; Kaneko, A. ; Mimura, T. ; Abe, M.
Author_Institution :
Fujitsu Laboratories Ltd,
fYear :
1991
fDate :
13-15 Feb. 1991
Firstpage :
152
Lastpage :
308
Keywords :
Capacitance; Delay effects; Delay estimation; Dielectric constant; Dielectric substrates; HEMTs; Integrated circuit interconnections; Laboratories; SPICE; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 1991. Digest of Technical Papers. 38th ISSCC., 1991 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-87942-644-6
Type :
conf
DOI :
10.1109/ISSCC.1991.689105
Filename :
689105
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=3127533
بازگشت