DocumentCode
3127674
Title
A run-time reconfigurable array of multipliers architecture
Author
Lin, Rong
Author_Institution
SUNY
fYear
2000
fDate
23-27 April 2000
Firstpage
1457
Lastpage
1464
Keywords
Central Processing Unit; Computer architecture; Computer science; Concurrent computing; Hardware; Matrix decomposition; Pipelines; Runtime; Switches; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel and Distributed Processing Symposium., Proceedings 15th International
Conference_Location
San Francisco, CA, USA
ISSN
1530-2075
Print_ISBN
0-7695-0990-8
Type
conf
DOI
10.1109/IPDPS.2001.925129
Filename
925129
Link To Document