DocumentCode
3128001
Title
A 336-neuron 28k-synapse Self-learning Neural Network Chip With Branch-neuron-unit Architecture
Author
Arima, Y. ; Mashiko, K. ; Okada, K. ; Yamada, T. ; Maeda, A. ; Notani, H. ; Kondoh, H. ; Kayano, S.
Author_Institution
Mitsubishi Electric Corporation
fYear
1991
fDate
13-15 Feb. 1991
Firstpage
182
Lastpage
313
Keywords
CMOS technology; Capacitors; Fluctuations; Integrated circuit interconnections; Laboratories; Large scale integration; Neural networks; Neurons; Research and development; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 1991. Digest of Technical Papers. 38th ISSCC., 1991 IEEE International
Conference_Location
San Francisco, CA, USA
Print_ISBN
0-87942-644-6
Type
conf
DOI
10.1109/ISSCC.1991.689118
Filename
689118
Link To Document