DocumentCode :
3128588
Title :
VLSI architecture for stack filters
Author :
Gevorkian, D. ; Hu, M. ; Vainio, O. ; Astola, J.
Author_Institution :
Signal Process. Lab., Tampere Univ. of Technol., Finland
Volume :
2
fYear :
1997
fDate :
2-4 Jul 1997
Firstpage :
641
Abstract :
A new approach to implementation of stack filtering has been suggested in the work of Astola et al. (see Proceedings of Int. Conf. on Digital Signal Processing, Limassol, Cyprus, 1995). Based on this approach, efficient algorithms and a new VLSI architecture are developed. They are fast and programmable, thus supporting adaptive stack filtering in real time. An arbitrary stack filter (i.e., filter based on any positive Boolean function) of given window size M is realizable on this architecture in constant time. The architecture is simple without long connections or feedback loops. A new VLSI implementation of order statistic filtering is proposed. Simulations verify the high-speed functionality of the device
Keywords :
CMOS digital integrated circuits; VLSI; adaptive filters; adaptive signal processing; digital filters; CMOS technology; VLSI architecture; adaptive stack filtering; efficient algorithms; order statistic filtering; positive Boolean functions; programmable architecture; real-time filtering; simulations; stack filters; window size; Adaptive filters; Boolean functions; CMOS technology; Computer architecture; Digital filters; Filtering; Samarium; Signal processing; Statistics; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Digital Signal Processing Proceedings, 1997. DSP 97., 1997 13th International Conference on
Conference_Location :
Santorini
Print_ISBN :
0-7803-4137-6
Type :
conf
DOI :
10.1109/ICDSP.1997.628431
Filename :
628431
Link To Document :
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