Title :
Fully depleted surrounding gate transistor (SGT) for 70 nm DRAM and beyond
Author :
Goebel, B. ; Lutzen, J. ; Manger, D. ; Moll, P. ; Mummler, K. ; Popp, M. ; Scheler, U. ; Schlosser, T. ; Seidl, H. ; Sesterhenn, M. ; Slesazeck, S. ; Tegen, S.
Author_Institution :
Memory Dev. Center, Infineon Technol. Corp., Dresden, Germany
Abstract :
A high performance surrounding gate transistor (SGT) enabling sufficient static and dynamic retention time of future DRAM cells is presented. For the first time, we demonstrate a fully depleted SGT, that shows no reduction of the retention time due to the transient bipolar effect. This effect potentially prevents DRAM application of fully depleted SGTs and is therefore investigated in detail. Based on experimental results, the impact of the proposed SGT on the scalability and performance of future DRAMs is discussed.
Keywords :
DRAM chips; MOS memory circuits; MOSFET; leakage currents; nanoelectronics; 70 nm; DRAM cells; DRAM scalability; dynamic retention time; fully depleted SGT; fully depleted surrounding gate transistor; static retention time; transient bipolar effect; vertical MOSFET; Capacitors; Doping; Leakage current; MOSFETs; Oxidation; Random access memory; Scalability; Silicon; Space charge; Testing;
Conference_Titel :
Electron Devices Meeting, 2002. IEDM '02. International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-7462-2
DOI :
10.1109/IEDM.2002.1175831
