DocumentCode :
3128884
Title :
Virtualization of Computing Resources in RCS for Multi-task Stream Applications
Author :
Kirischian, L. ; Dumitriu, V. ; Chun, P.W.
Author_Institution :
Dept. of Electr. & Comput. Eng., Ryerson Univ., Toronto, ON, Canada
fYear :
2009
fDate :
9-11 Dec. 2009
Firstpage :
368
Lastpage :
373
Abstract :
The possibility for distribution of FPGA resources in the temporal domain for multi-modal & multi-task workloads conceptually allows virtualization of logic, communication and input/output resources similar to memory virtualization in advanced conventional computers (e.g. superscalar). This, in turn, can dramatically increase the cost-effectiveness of FPGA based reconfigurable computing systems (RCS). In the presented ¿proof-of-concept¿ research the following topics have been investigated, developed and tested: i) architecture of a platform to support the dynamic allocation of application specific virtual processors (ASVP), ii) mechanisms for run-time on-chip assembly of ASVP from virtual hardware components (VHC) and iii) mechanisms for run-time on-chip components (VHC) relocation in predetermined regions of the FPGA device. The above mechanisms have been implemented and tested on a specially developed platform: the multi-task adaptive reconfigurable system (MARS) platform. The actual application of MARS was prototyping a high-performance multi-mode stereo-vision system (200 fps) for the next generation of space-borne computing platforms.
Keywords :
field programmable gate arrays; reconfigurable architectures; FPGA resources distribution; advanced conventional computers; application specific virtual processors; field programmable gate arrays; high-performance multimode stereo-vision system; memory virtualization; multitask adaptive reconfigurable system platform; multitask stream applications; reconfigurable computing systems; run-time on-chip assembly; run-time on-chip component relocation; space-borne computing platforms; virtual hardware components; Application software; Application virtualization; Computer architecture; Distributed computing; Field programmable gate arrays; Mars; Reconfigurable logic; Resource virtualization; Runtime; Testing; FPGA; Reconfigurable systems; Resources virtualization; Run-time reconfiguration (RTR); Virtual component; Virtual processor; component relocation; on-chip assembly;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Reconfigurable Computing and FPGAs, 2009. ReConFig '09. International Conference on
Conference_Location :
Quintana Roo
Print_ISBN :
978-1-4244-5293-4
Electronic_ISBN :
978-0-7695-3917-1
Type :
conf
DOI :
10.1109/ReConFig.2009.51
Filename :
5382090
Link To Document :
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