DocumentCode :
3129646
Title :
Evaluation of the Raw microprocessor: an exposed-wire-delay architecture for ILP and streams
Author :
Taylor, Michael Bedford ; Psota, James ; Saraf, Arvind ; Shnidman, Nathan ; Strumpen, Volker ; Frank, Matt ; Amarasinghe, Saman ; Agarwal, Anant ; Lee, Walter ; Miller, Jason ; Wentzlaff, David ; Bratt, Ian ; Greenwald, Ben ; Hoffmann, Henry ; Johnson, Pa
Author_Institution :
CSAIL, Massachusetts Inst. of Technol., Cambridge, MA, USA
fYear :
2004
fDate :
19-23 June 2004
Firstpage :
2
Lastpage :
13
Abstract :
This paper evaluates the Raw microprocessor. Raw addresses the challenge of building a general-purpose architecture that performs well on a larger class of stream and embedded computing applications than existing microprocessors, while still running existing ILP-based sequential programs with reasonable performance in the face of increasing wire delays. Raw approaches this challenge by implementing plenty of on-chip resources - including logic, wires, and pins - in a tiled arrangement, and exposing them through a new ISA, so that the software can take advantage of these resources for parallel applications. Raw supports both ILP and streams by routing operands between architecturally-exposed functional units over a point-to-point scalar operand network. This network offers low latency for scalar data transport. Raw manages the effect of wire delays by exposing the interconnect and using software to orchestrate both scalar and stream data transport. We have implemented a prototype Raw microprocessor in IBM´s 180 nm, 6-layer copper, CMOS 7SF standard-cell ASIC process. We have also implemented ILP and stream compilers. Our evaluation attempts to determine the extent to which Raw succeeds in meeting its goal of serving as a more versatile, general-purpose processor. Central to achieving this goal is Raw´s ability to exploit all forms of parallelism, including ILP, DLP, TLP, and Stream parallelism. Specifically, we evaluate the performance of Raw on a diverse set of codes including traditional sequential programs, streaming applications, server workloads and bit-level embedded computation. Our experimental methodology makes use of a cycle-accurate simulator validated against our real hardware. Compared to a 180nm Pentium-III, using commodity PC memory system components, Raw performs within a factor of 2× for sequential applications with a very low degree of ILP, about 2× to 9× better for higher levels of ILP, and 10×-100× better when highly parallel applications are coded in a stream language or optimized by hand. The paper also proposes a new versatility metric and uses it to discuss the generality of Raw.
Keywords :
CMOS digital integrated circuits; IBM computers; application specific integrated circuits; delays; integer programming; linear programming; microprocessor chips; multiprocessor interconnection networks; parallel algorithms; performance evaluation; 180 nm; 6-layer copper CMOS 7SF standard-cell ASIC process; IBM; ILP compilers; ILP-based sequential programs; PC memory system components; Pentium-III; Raw microprocessor evaluation; architecturally-exposed functional units; bit-level embedded computation; cycle-accurate simulator; embedded computing applications; exposed-wire-delay architecture; general-purpose architecture; general-purpose processor; instruction level parallelism; interconnect exposure; network latency; on-chip resources; parallel applications; point-to-point scalar operand network; routing operands; scalar data transport; server workloads; stream compilers; stream computing applications; stream data transport; stream language; streaming applications; tiled arrangement; versatility metric; wire delay effect management; Buildings; Computer architecture; Delay; Embedded computing; Instruction sets; Logic; Microprocessors; Parallel processing; Pins; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Architecture, 2004. Proceedings. 31st Annual International Symposium on
ISSN :
1063-6897
Print_ISBN :
0-7695-2143-6
Type :
conf
DOI :
10.1109/ISCA.2004.1310759
Filename :
1310759
Link To Document :
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