Title :
A predictive reliability model for PMOS bias temperature degradation
Author :
Mahapatra, S. ; Alam, M.A.
Author_Institution :
Dept. of Electr. Eng., Indian Inst. of Technol., Mumbai, India
Abstract :
Bias temperature degradation is studied in p-MOSFETs. The physical mechanisms responsible for degradation over a wide range of stress bias and temperature have been identified. A novel scaling methodology is proposed that helps in obtaining a simple, analytical model useful for reliability projection.
Keywords :
MOSFET; semiconductor device models; semiconductor device reliability; PMOS bias temperature degradation; analytical model; p-MOSFETs; predictive reliability model; reliability projection; scaling methodology; stress bias range; temperature range; Analytical models; CMOS analog integrated circuits; Charge carrier processes; Degradation; Hydrogen; Low voltage; MOSFET circuits; Predictive models; Stress; Temperature distribution;
Conference_Titel :
Electron Devices Meeting, 2002. IEDM '02. International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-7462-2
DOI :
10.1109/IEDM.2002.1175890
