A new RNS FIR filter architecture

Author

Cardarilli, G.C. ; Re, M. ; Lojacono, R.

Author_Institution

Dept. of Electron. Eng., Rome Univ., Italy

Volume

2

fYear

1997

fDate

2-4 Jul 1997

Firstpage

671

Abstract

A fast architecture for the implementation of FIR filters based on the residue number system is proposed. High-speed is obtained by introducing residue arithmetic that permits the computation of the filter output by using N FIR subfilters of reduced dynamic range operating in parallel. Moreover, a new approach for the computation of the modulo operation on each term of the linear combination has been developed. The filter implementation is based on small look-up tables and fast multioperand carry-save adders

Keywords

FIR filters; adders; digital filters; parallel architectures; residue number systems; table lookup; FIR subfilters; RNS FIR filter architecture; fast architecture; fast multioperand carry-save adders; filter implementation; filter output; linear combination; look-up tables; modulo operation; parallel operation; reduced dynamic range; residue number system; Arithmetic; Computer architecture; Concrete; Concurrent computing; Differential equations; Digital filters; Dynamic range; Electronic mail; Finite impulse response filter; Hardware;

fLanguage

English

Publisher

ieee

Conference_Titel

Digital Signal Processing Proceedings, 1997. DSP 97., 1997 13th International Conference on

Conference_Location

Santorini

Print_ISBN

0-7803-4137-6

Type

conf

DOI

10.1109/ICDSP.1997.628439

Filename

628439