Advanced metal barrier free Cu damascene interconnects with PECVD silicon carbide barriers for 90/65-nm BEOL technology

Author

Wu, Z.C. ; Lu, Y.C. ; Chiang, C.C. ; Chen, M.C. ; Chen, B.T. ; Wang, G.J. ; Chen, Y.T. ; Huang, J.L. ; Jang, S.M. ; Liang, M.S.

Author_Institution

Dept. of Dielectric & CMP, Taiwan Semicond. Manuf. Co., Hsinchu, Taiwan

fYear

2002

fDate

8-11 Dec. 2002

Firstpage

595

Lastpage

598

Abstract

Advanced metal barrier free (MBF) Cu dual damascene interconnects (DDIs) have been successfully fabricated using a low-k CVD OSG (k=2.5) and PECVD silicon carbides for the first time. With PECVD silicon carbides replacing TaN, the Cu DDIs thus built showed 8% better in interconnect RC delay, 36% lower in via resistance and three orders of magnitude lower in line-line leakage at 200/spl deg/C. The newly developed technology also enhanced Cu TDDB lifetime by more than three orders of magnitude. On the MBF DDIs, 15%-faster 90-nm CMOS device operation has been achieved, which makes the newly developed MBF Cu DDI technology promising for high performance sub-90 nm CMOS devices and beyond.

Keywords

CMOS integrated circuits; copper; delays; dielectric thin films; diffusion barriers; integrated circuit interconnections; integrated circuit metallisation; leakage currents; semiconductor device breakdown; 200 degC; 65 nm; 90 nm; BEOL technology; CMOS; Cu; Cu-SiC; PECVD SiC barriers; RC delay; TDDB lifetime; dual damascene interconnects; line-line leakage; low-k CVD OSG; via resistance; Acceleration; Atherosclerosis; CMOS technology; Delay; Dielectric breakdown; Research and development; Semiconductor device manufacture; Silicon carbide; Temperature; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 2002. IEDM '02. International

Conference_Location

San Francisco, CA, USA

Print_ISBN

0-7803-7462-2

Type

conf

DOI

10.1109/IEDM.2002.1175911

Filename

1175911