• DocumentCode
    3130985
  • Title

    Evolutionary multiobjective design targeting a Field Programmable Transistor Array

  • Author

    Aguirre, A.H. ; Zebulum, R.S. ; Coello Coello, C.

  • Author_Institution
    Center for Res. in Math., Guanajuato, Mexico
  • fYear
    2004
  • fDate
    26-26 June 2004
  • Firstpage
    199
  • Lastpage
    205
  • Abstract
    This paper introduces the ISPAES algorithm for circuit design targeting a Field Programmable Transistor Array (FPTA). The use of evolutionary algorithms is common in circuit design problems, where a single fitness function drives the evolution process. Frequently, the design problem is subject to several goals or operating constraints, thus, designing a suitable fitness function catching all requirements becomes an issue. Such a problem is amenable for multiobjective optimization, however, evolutionary algorithms lack an inherent mechanism for constraint handling. This paper introduces ISPAES, an evolutionary optimization algorithm enhanced with a constraint handling technique. Several design problems targeting a FPTA show the potential of our approach.
  • Keywords
    constraint handling; evolutionary computation; field programmable analogue arrays; network synthesis; optimisation; ISPAES algorithm; circuit design; constraint handling; evolution process; evolutionary algorithms; evolutionary multiobjective design; field programmable transistor array; multiobjective optimization; optimization algorithm; single fitness function; Algorithm design and analysis; Circuit synthesis; Constraint optimization; Design optimization; Evolutionary computation; Laboratories; Mathematics; Pareto optimization; Process design; Propulsion;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Evolvable Hardware, 2004. Proceedings. 2004 NASA/DoD Conference on
  • Conference_Location
    Seattle, WA, USA
  • Print_ISBN
    0-7695-2145-2
  • Type

    conf

  • DOI
    10.1109/EH.2004.1310831
  • Filename
    1310831