DocumentCode
3131614
Title
Reducing test cost through the use of digital testers for analog tests
Author
Sweeney, John ; Tsefrekas, Alan
Author_Institution
IBM RF & Analog Test Dev., Essex Junction, VT
fYear
2005
fDate
8-8 Nov. 2005
Lastpage
446
Abstract
The addition of extensive analog blocks to traditionally pure digital ASIC designs is driving the need to verify these analog functions. There are several possible solutions for verifying these analog blocks. These include design for test (DFT), mixed signal automated test equipment (ATE), and the use of custom measurement circuitry on a purely digital tester. This paper focuses entirely on the use of custom measurement circuitry on an otherwise purely digital tester
Keywords
automatic test equipment; design for testability; integrated circuit testing; mixed analogue-digital integrated circuits; analog functions; analog tests; design for test; digital ASIC designs; digital testers; extensive analog blocks; mixed signal automated test equipment; Application specific integrated circuits; Automatic testing; Circuit testing; Costs; Jitter; Logic testing; Pins; Radio frequency; Signal to noise ratio; System testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 2005. Proceedings. ITC 2005. IEEE International
Conference_Location
Austin, TX
Print_ISBN
0-7803-9038-5
Type
conf
DOI
10.1109/TEST.2005.1584003
Filename
1584003
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