A vector-based approach for power supply noise analysis in test compaction

Author

Wang, Jing ; Yue, Ziding ; Lu, Xiang ; Qiu, Wangqi ; Shi, Weiping ; Walker, D.M.H.

Author_Institution

Dept. of Comput. Sci., Texas A&M Univ., College Station, TX

fYear

2005

fDate

8-8 Nov. 2005

Lastpage

526

Abstract

Excessive power supply noise can lead to overkill during delay test. A static test vector compaction solution is described to prevent such overkill. Low-cost power supply noise models are developed and used in compaction. An error analysis of these models is given. This paper improves on prior work in terms of models and algorithm to increase accuracy and performance. Experimental results are given on ISCAS89 circuits

Keywords

error analysis; integrated circuit modelling; integrated circuit noise; integrated circuit testing; power supply circuits; delay test; error analysis; low-cost power supply noise models; power supply noise analysis; static test vector compaction; Circuit faults; Circuit noise; Circuit testing; Compaction; Crosstalk; Delay; Noise level; Power supplies; Semiconductor device noise; Timing;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 2005. Proceedings. ITC 2005. IEEE International

Conference_Location

Austin, TX

Print_ISBN

0-7803-9038-5

Type

conf

DOI

10.1109/TEST.2005.1584012

Filename

1584012

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3131825