Title :
Performance enhancement on sub-70 nm strained silicon SOI MOSFETs on ultra-thin thermally mixed strained silicon/SiGe on insulator (TM-SGOI) substrate with raised S/D
Author :
Lee, B.H. ; Mocuta, A. ; Bedell, S. ; Chen, H. ; Sadana, D. ; Rim, K. ; O´Neil, P. ; Mo, R. ; Chan, K. ; Cabral, C. ; Lavoie, C. ; Mocuta, D. ; Chakravarti, A. ; Mitchell, R.M. ; Mezzapelle, J. ; Jamin, F. ; Sendelbach, M. ; Kermel, H. ; Gribelyuk, M. ; D
Author_Institution :
Semicond. R&D Center, IBM Microelectron., Hopewell Junction, NY, USA
Abstract :
High quality ultra-thin TM-SGOI substrate with T/sub SOI/ < 55 nm is developed to combine the device benefits of strained silicon and SOI. 80-90% Id,sat and electron mobility increase are shown in long channel nFET device. For the first time, 20-25% device performance enhancement is demonstrated at 55 nm short channel strained silicon SGOI nFET devices.
Keywords :
Ge-Si alloys; MOSFET; electron mobility; silicon-on-insulator; 55 nm; Si-SiGe; electron mobility; long-channel nFET device; raised source/drain; saturation drain current; short-channel nFET device; strained silicon SOI MOSFET; ultra-thin TM-SGOI substrate; ultra-thin thermally mixed strained silicon/SiGe-on-insulator substrate; Electron mobility; Germanium silicon alloys; Insulation; MOSFETs; Pulse measurements; Silicides; Silicon devices; Silicon germanium; Silicon on insulator technology; Substrates;
Conference_Titel :
Electron Devices Meeting, 2002. IEDM '02. International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-7462-2
DOI :
10.1109/IEDM.2002.1175993
