DocumentCode :
3132189
Title :
Effective use of customized AutoSAT templates in a foundry environment for better recipe set-up
Author :
Choi-Yoke, Sayvonna Wong ; Small, Martha ; Ghaskadvi, Rajesh ; Jawaharlal, Sundar ; Yin, Gabriel
fYear :
2001
fDate :
2001
Firstpage :
145
Lastpage :
149
Abstract :
Efficient defect detection and analysis is critical to the success of any fab. For a yield management group, it is essential to capture defects of interest and to eliminate defects that do not impact yield. In a foundry where multiple devices are manufactured, it is crucial to have an inspection strategy that is transferable to many devices. Such a strategy also needs to be effective in capturing the same defect types by process layer. This paper discusses the challenges involved in creating such a strategy and steps taken to successfully combat it through a collaboration between Chartered Silicon Partnership (CSP) and KLA-Tencor (K-T). A KLA-Tencor 2139 brightfield inspection tool was used for defect image capture. Segmented Auto Threshold (SAT), a tool available on the 2139, is used to eliminate nuisance defects during inspection. SAT is a powerful tool, but the inspection recipes can be complex. Another tool on the 2139, AutoSAT, may be used to facilitate creation of such sophisticated inspections. AutoSAT samples defects on the wafer and prompts the user to classify them as real, killer or nuisance. Once this is done, AutoSAT uses a predefined SAT template set to optimize the thresholds to suppress nuisance and enhance critical defect capture. This approach is particularly useful in a foundry environment where the yield management group is faced with a variety of devices, requiring many inspections
Keywords :
fault location; inspection; integrated circuit testing; integrated circuit yield; production engineering computing; production testing; software tools; AutoSAT; AutoSAT defect sampling; SAT tool; Segmented Auto Threshold tool; brightfield inspection tool; critical defect capture; customized AutoSAT templates; defect analysis; defect capture; defect classification; defect detection; defect elimination; defect image capture; defect types; defect yield impact; foundry environment; inspection; inspection recipe complexity; killer defects; multiple device manufacture; nuisance defects; process layer; real defects; recipe set-up; transferable inspection strategy; yield management; Collaboration; Delay; Etching; Foundries; Inspection; Manufacturing; Optical scattering; Pixel; Semiconductor device noise; Silicon;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Advanced Semiconductor Manufacturing Conference, 2001 IEEE/SEMI
Conference_Location :
Munich
ISSN :
1078-8743
Print_ISBN :
0-7803-6555-0
Type :
conf
DOI :
10.1109/ASMC.2001.925638
Filename :
925638
Link To Document :
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