An investigation of circular resist residue defects in the development of a flash memory process flow

This paper presents an investigation into the impact of resist residue defects discovered during the development of a new flash memory process flow. Previously, it was reported that resist residue defects are inherently present in many types of DUV resist processing. However, these residues were largely considered to be “nuisance” defects due to their location and very subtle physical characteristics. The newly developed process flow revealed that this defect source is in fact capable of producing “killer” defects at very high densities. This work begins with a review of the original investigation into the source and characteristics of the defect. It follows with a critical area analysis calculation to estimate the yield impact of varying degrees of this problem. It then discusses how the surface preparation and product interact with the lithography process to impact the formation of these resist residue defects. A model explaining the defect formation mechanism is presented and explanations of the leverage gained through various process modifications are given based on this model