• DocumentCode
    3132715
  • Title

    Testing throughput computing interconnect topologies with Tbits/sec bandwidth in manufacturing and in field

  • Author

    Parulkar, Ishwar ; Huang, Dawei ; Chua, Leandro, Jr. ; Doblar, Drew

  • Author_Institution
    Scalable Syst. Group, Sun Microsystems, Inc., Santa Clara, CA
  • fYear
    2005
  • fDate
    8-8 Nov. 2005
  • Lastpage
    1008
  • Abstract
    The next generation of throughput computing systems designed by Sun Microsystems require interconnect with bandwidth of the order of Tbits/sec. Interconnect topologies for such high bandwidth are based on a few hundred SerDes I/Os on chips operating at multi-Gbps. Testing of these I/Os at only the component level is inadequate. In this paper, we describe the design-for-testability features for system manufacturing and on-line test of such I/Os and interconnect
  • Keywords
    design for testability; integrated circuit interconnections; integrated circuit manufacture; integrated circuit testing; microprocessor chips; SerDes I-O testing; Sun Microsystems; design-for-testability; interconnect topology testing; on-line test; system interconnect; system manufacturing; throughput computing systems; Bandwidth; Computer aided manufacturing; Microprocessors; Protocols; Pulp manufacturing; Sun; System testing; Throughput; Topology; Yarn;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 2005. Proceedings. ITC 2005. IEEE International
  • Conference_Location
    Austin, TX
  • Print_ISBN
    0-7803-9038-5
  • Type

    conf

  • DOI
    10.1109/TEST.2005.1584066
  • Filename
    1584066