DocumentCode :
3133157
Title :
How are we going to test SoCs on a board?: the users viewpoint
Author :
Carisson, G.
Author_Institution :
Ericsson, Stockholm
fYear :
2005
fDate :
8-8 Nov. 2005
Lastpage :
1262
Abstract :
This article provides an overview on SoC´s on board testing. It discusses the topic of life cycle perspective, efficient test required, re-use challenges, test access and control, SoC DFT architecture, test sequencing, DFT support, and debug and diagnosis support
Keywords :
design for testability; printed circuit testing; system-on-chip; DFT support; SoC DFT architecture; life cycle perspective; on board testing; test access; test sequencing; Chip scale packaging; Circuit testing; Costs; Design for testability; Marketing management; Signal generators; Silicon; System testing; System-on-a-chip; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference, 2005. Proceedings. ITC 2005. IEEE International
Conference_Location :
Austin, TX
Print_ISBN :
0-7803-9038-5
Type :
conf
DOI :
10.1109/TEST.2005.1584095
Filename :
1584095
Link To Document :
بازگشت