DocumentCode :
3133203
Title :
Board and system test with SoC DFT
Author :
Robinson, Gordon D.
fYear :
2005
fDate :
8-8 Nov. 2005
Lastpage :
1266
Abstract :
Testing an SoC in its chip manufacturing process is the simplest of the test problems that SoC and the DFT engineers working on its design will ever encounter. This article outlines the task and the challenges involved in DFT activities. It also tackled the implication of SoC DFT in later tests activities
Keywords :
design for testability; system-on-chip; SoC DFT; board test; chip manufacturing process; system test; Built-in self-test; Certification; Design engineering; Design for testability; Embedded software; Manufacturing processes; Software standards; Software testing; System testing; Universal Serial Bus;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference, 2005. Proceedings. ITC 2005. IEEE International
Conference_Location :
Austin, TX
Print_ISBN :
0-7803-9038-5
Type :
conf
DOI :
10.1109/TEST.2005.1584098
Filename :
1584098
Link To Document :
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