Title :
IP3 boost circuitry for highly linear CDMA low noise amplifiers (LNA)
Author :
Watanabe, Glenn ; Lau, Henry ; Schiltz, Tom ; Holbrook, Rick
Author_Institution :
Semicond. Products Sector, Motorola Inc., Tempe, AZ, USA
Abstract :
A highly linear CDMA LNA is presented which has a measured IIP3 of +12.5 dBm at 1.96 GHz. The high linearity is achieved with the aid of a DC bias boost circuitry that increases the IIP3 and P-1 dB by 9 dB. This circuitry provides a low impedance at the difference frequency of the two-tone spacing for high IIP3 and P-1 dB and a large impedance at the high frequencies to preserve the noise figure and S-parameters
Keywords :
MMIC amplifiers; UHF amplifiers; UHF integrated circuits; code division multiple access; integrated circuit noise; intermodulation; 1.96 GHz; CDMA low noise amplifiers; DC bias boost circuitry; IIP3; IP3 boost circuitry; high linearity; highly linear LNA; two-tone test; Circuit noise; Impedance; Inductors; Linearity; Low-noise amplifiers; Multiaccess communication; Noise figure; Radio frequency; Radiofrequency amplifiers; Semiconductor device noise;
Conference_Titel :
Microwave Conference, 2000 Asia-Pacific
Conference_Location :
Sydney, NSW
Print_ISBN :
0-7803-6435-X
DOI :
10.1109/APMC.2000.925765
