DocumentCode :
3133329
Title :
The SNAP project: towards sub-nanosecond arithmetic
Author :
Flynn, M.J. ; Nowka, K. ; Bewick, G. ; Schwarz, E. ; Quach, N.
Author_Institution :
Comput. Syst. Lab., Stanford Univ., CA, USA
fYear :
1995
fDate :
19-21 Jul 1995
Firstpage :
75
Lastpage :
82
Abstract :
SNAP-the Stanford subnanosecond arithmetic processor-is an interdisciplinary effort to develop theory, tools, and technology for realizing an arithmetic processor with execution rates under 1 ns. Specific improvements in clocking methods, floating-point addition algorithms, floating-point multiplication algorithms, division and higher-level function algorithms, design tools, and packaging technology were studied. These improvements have been demonstrated in the implementation of several VLSI designs
Keywords :
VLSI; floating point arithmetic; packaging; SNAP project; Stanford subnanosecond arithmetic processor; VLSI designs; arithmetic processor; clocking methods; division; floating-point addition algorithms; floating-point multiplication algorithms; higher-level function algorithms; packaging technology; sub-nanosecond arithmetic; Algorithm design and analysis; CMOS technology; Clocks; Digital arithmetic; Integrated circuit interconnections; Laboratories; Packaging; Pipeline processing; Propagation delay; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Arithmetic, 1995., Proceedings of the 12th Symposium on
Conference_Location :
Bath
Print_ISBN :
0-8186-7089-4
Type :
conf
DOI :
10.1109/ARITH.1995.465374
Filename :
465374
Link To Document :
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