DocumentCode
3133434
Title
State pruning for test vector generation for a multiprocessor cache coherence protocol
Author
Chen, Ying ; Abts, Dennis ; Lilja, David J.
Author_Institution
Electr. & Comput. Eng., Minnesota Univ., Minneapolis, MN, USA
fYear
2004
fDate
28-30 June 2004
Firstpage
74
Lastpage
77
Abstract
Verification is extremely important in designing digital systems such as a cache coherence protocol. Generating traces for system verification using a model checker and then using the traces to drive the RTL logic design simulation is an efficient method for debugging. This method has been called the witness string method (Abts and Roberts, 1999), which is based on DFS. We investigate a state pruning method that exploits multiple search heuristics in simultaneous DFS searches to choose the most efficient traces. We distribute the hash table of the entire state space among the simultaneous searches so that they cooperate to avoid redundant state exploration. To evaluate this search algorithm, we implant several protocol bugs in the Stanford DASH cache coherence protocol. Using an IBM Power4 system with the Berkeley Active Message library, we show an improvement in witness strings generation through the state pruning method over a pure DFS and a guided DFS.
Keywords
cache storage; formal logic; formal verification; program debugging; program verification; protocols; tree searching; RTL logic design simulation; Stanford DASH; depth-first search; digital system design; hash table; model checking; multiprocessor cache coherence protocol; search heuristics; state exploration; state pruning; system verification; test vector generation; witness string; Coherence; Computer bugs; Debugging; Digital systems; Implants; Libraries; Logic design; Protocols; State-space methods; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Rapid System Prototyping, 2004. Proceedings. 15th IEEE International Workshop on
ISSN
1074-6005
Print_ISBN
0-7695-2159-2
Type
conf
DOI
10.1109/IWRSP.2004.1311099
Filename
1311099
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