Title :
Automatic building of executable models from abstract SoC architectures made of heterogeneous subsystems
Author :
Sarmento, Adriano ; Cesario, Wander ; Jerraya, Ahmed Amine
Author_Institution :
TIMA Lab., SLS Group, Grenoble, France
Abstract :
Designing SoCs requires several refinement steps using abstract architectural models before achieving a correct implementation of the system described at RT-level before and after each refinement step, the SoC model must be validated. If the model is executable then validation can be easily done by simulation. However, since modern SoCs are composed of heterogeneous subsystems, executable models for such heterogeneous systems require cosimulation interfaces to enable communication among the different subsystems. Most current validation approaches give little support for building executable models for heterogeneous systems. This paper presents an approach for automatic building executable models from abstract SoC architectures, allowing validation at early stages, at several intermediate design steps and with heterogeneous subsystems. Results for the validation of a MPEG-4 video encoder application showed that the time for building executable models was reduced drastically.
Keywords :
computer architecture; integrated circuit design; integrated circuit modelling; program verification; system-on-chip; video coding; MPEG-4 video encoder; SoCs design; abstract SoC architectures; cosimulation interfaces; Application software; Buildings; Hardware; Laboratories; Laser sintering; MPEG 4 Standard; Process design; Protocols; Specification languages; System-on-a-chip;
Conference_Titel :
Rapid System Prototyping, 2004. Proceedings. 15th IEEE International Workshop on
Print_ISBN :
0-7695-2159-2
DOI :
10.1109/IWRSP.2004.1311101