Design and implementation of emulator on FPGA

Author

Hayama, Kiyoteru ; Matsumoto, Tsutomu ; Shimada, Yasuyuki

Author_Institution

Kumamoto Nat. Coll. of Technol., Kumamoto

fYear

2007

fDate

8-10 May 2007

Firstpage

1

Lastpage

5

Abstract

In this study, experiment set up for engineering students is proposed. The experiment using the proopsed set up consists of the model computer, internal parts for theoretical test, external parts for input/output examination and exclusive assembler. Students try to design a logic circuit and implement the logic circuit on FPGA (field programmable gate array) board using hardware description language (HDL). The test circuits of clock generator, ALU, accumulator, program counter, instruction register, memory, I/O ports, and controller were also designed.

Keywords

computer science education; electronic engineering education; field programmable gate arrays; hardware description languages; logic design; FPGA; clock generator; emulator; field programmable gate array; hardware description language; instruction register; logic circuit; program counter; Assembly; Circuit testing; Clocks; Counting circuits; Engineering students; Field programmable gate arrays; Hardware design languages; Logic circuits; Programmable logic arrays; Registers;

fLanguage

English

Publisher

ieee

Conference_Titel

Mechatronics, ICM2007 4th IEEE International Conference on

Conference_Location

Kumamoto

Print_ISBN

1-4244-1183-1

Electronic_ISBN

1-4244-1184-X

Type

conf

DOI

10.1109/ICMECH.2007.4279986

Filename

4279986