DocumentCode :
3133652
Title :
Transaction-level prototyping of a UMTS outer-modem for system-on-chip validation and architecture exploration
Author :
Martinelli, Paolo ; Wellig, Armin ; Zory, Julien
Author_Institution :
Adv. Syst. Technol., STMicroelectronics N.V., Geneva, Switzerland
fYear :
2004
fDate :
28-30 June 2004
Firstpage :
193
Lastpage :
200
Abstract :
Growing demand for mobility and multimedia capacity in handheld devices translates into very complex systems where time-to-market development is critical. High data rates and improved system capacity for IP-based services increase controlling and dynamic scheduling of already complex modem technologies. This paper describes the prototyping of a UMTS terminal subsystem, which deals with several physical layer tasks such as channel multiplexing or interleaving. Our modeling strategy relies on a transaction-level platform methodology built on top of the SystemC language. The system-on-chip dynamics is modeled with behavioral modules, generic bus transactions and memory accesses. Several examples demonstrate that such a prototyping makes it possible to validate highly dynamic systems; this reduces system-on-chip development costs as it is recognized that about 70% of it lies today into verification. This prototyping also offers a large potential for fast architecture exploration with the capacity to dimension the memory components or evaluate the bus contention.
Keywords :
3G mobile communication; IP networks; cellular radio; computer architecture; digital signal processing chips; dynamic scheduling; integrated circuit design; integrated circuit manufacture; integrated circuit modelling; mobile handsets; modems; multimedia communication; multiplexing; rapid prototyping (industrial); system-on-chip; time to market; IP-based services; SystemC language; UMTS outer-modem; UMTS terminal subsystem prototyping; behavioral modules; channel interleaving; channel multiplexing; dynamic scheduling; generic bus transactions; handheld devices; memory access; memory components; mobility; modem technologies; multimedia capacity; physical layer tasks; system capacity; system-on-chip architecture exploration; system-on-chip development; system-on-chip dynamics modeling; system-on-chip validation; time-to-market development; transaction-level platform methodology; transaction-level prototyping; 3G mobile communication; Control systems; Dynamic scheduling; Handheld computers; Modems; Multimedia systems; Physical layer; Prototypes; System-on-a-chip; Time to market;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Rapid System Prototyping, 2004. Proceedings. 15th IEEE International Workshop on
ISSN :
1074-6005
Print_ISBN :
0-7695-2159-2
Type :
conf
DOI :
10.1109/IWRSP.2004.1311117
Filename :
1311117
Link To Document :
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